The present invention is directed to nanostructured thermoelectric elements and the like and a method for production thereof, namely by combining layer-by-layer assembly of silica or mesoporous silica precursors or other suitable compounds within ordered nanoporous templates to effectively reduce each individual nanopore diameter well below that of the limits of the as-fabricated nanoporous template. These hierarchical templates can be either fabricated freestanding or fabricated directly on support materials such as electrically conductive or insulating material. Furthermore, inclusion of material within the hierarchical nanopores facilitates the directed fabrication of ultra-high aspect ratio nanostructures. In the primary embodiment, these high aspect ratio nanostructures can be used for anisotropic, phonon-confined thermoelectric device fabrication. In addition, the fabrication process, as outlined, is a detailed method for the fabrication of conformal (or conformable) thermoelectric arrays which are grown on any shaped support; so long as the initial support is composed of aluminum, zinc, tin, antimony, titanium, magnesium, niobium, tantalum or any other metal that undergoes electrochemical formation of ordered nanopores. The materials listed are known producers of arrayed nanopores under anodic electrochemical oxidation (abbreviated hereto forth as “anodization” or anodized). In other embodiments these nanostructures can be leveraged in applications where ultra-high surface area, vertically oriented and arrayed nanostructures are desired. This secondary embodiment has applications in batteries, capacitors, electrochemistry, chemical conversion, photovoltaic devices and many other chemical and physical applications.
Improvements in thermoelectric (TE) energy conversion based on compositional research have nearly plateaued. However, the fabrication of existing thermoelectric materials with nanoscale dimensions has recently provided substantial advancements in device performance, as thermoelectric performance is well understood to improve substantially with increasing nanostructure anisotropy. [1: Hicks and Dresselhaus; Thermoelectric figure of merit of a one-dimensional conductor. Phys. Rev. B, 1993, (47), 16631-16634.]
Theoretical calculations show that one-dimensional nanowires are ideal thermoelectric devices, achieving figures of merit (zT) greater than 4 once the nanowire diameter falls below 5 nm. [1: Hicks and Dresselhaus; Thermoelectric figure of merit of a one-dimensional conductor. Phys. Rev. B, 1993, (47), 16631-16634.] Although synthesis of nanowires through the vapor-liquid-solid (VLS) method has achieved the dimensions required for enhanced thermoelectric performance, it is difficult to arrange these nanostructures into the architecture required for thermoelectric devices. Several researchers have applied the principles of the VLS method to fabricate vertically oriented arrays of nanowires through chemical vapor deposition (CVD). However, the surface tension between the seed catalyst and substrate determine the diameter of the nanowire. Ostwald ripening further places an upper limit on the diameters obtained. Typically, the diameters of nanowires prepared in the vertical arrays by CVD are much larger than the VLS method.
The caveats in preparing nanowire-based thermoelectric devices (thermoelectric nanowire) are (1) the ability to fabricate sub-10 nm diameter nanowires controllably and cheaply and (2) to systematically produce thermoelectric nanowires with a well-defined range of diameters on the 1-10 nm scale in order to better understand the practical ramifications of the theoretical predictions. The method of the present invention is able to employ nanoscale fabrication in the preparation of thermoelectric devices with a zT greater than 2. The present invention fabricates vertically oriented arrays of nanowires via ultra-high aspect ratio nanoporous templates with suitable properties for applications in TE devices. The nanowire arrays are fabricated with the aid of porous templates. These templates precisely direct nanowire diameter and aspect ratio through altering the conditions used to prepare the template. The advantage of this approach over CVD-based methods is the elimination of problems associated with seed catalyst. In addition, the use of templates provides a better range of nanowire diameter, length, orientation and array density, allowing for a systematic study of the effects of dimensionality on thermoelectric properties.
In a thermoelectric material, the redistribution of charge carriers is simultaneously associated with the formation of an electric field and a temperature gradient. Thus, the external application of a thermal gradient across the material results in the formation of an electrical bias. Likewise, an externally applied bias across the thermoelectric will cause heat to flow through the material. The degree that a particular material responds to either imposition is measured by the material's thermoelectric figure of merit, zT
                              z          ⁢                                          ⁢          T                =                                                            σα                2                            ⁢                              T                av                                      ⁢                                                                                    κ              e                        +                          κ              ph                                                          (        1        )            
Where ¾{circle around (R)}2, −e, −ph and Tav are the thermoelectric material's electrical conductivity, Seebeck coefficient, thermal conductivity due to electrons and phonons, and average temperature, respectively. Thermoelectric efficiency increases with both zT in Equation. (1) and the Carnot efficiency (ηc=1i Tcold=Thot), which is given by the ratio of temperatures from heat-source to heat-sink.
Equation. (1) highlights the primary route to enhanced thermoelectric performance: increasing σ or decreasing κ without affecting the other. Unfortunately, in bulk materials, κ and σ are directly coupled such that one cannot be altered without proportionally affecting the other in the same direction. This balance in conductivities has led to a bottleneck in thermoelectric materials research. Indeed, no thermoelectric material has been discovered with a zT>1 since the 1950's. In the last decade, many devices with zT>1 have been achieved through the introduction of nanostructures in bulk thermoelectric materials as well as in nanostructured thermoelectric materials themselves. [2: Hochbaum, Chen, Delgado, Liang, Garnett, Najarian, Majumdar and Yang; Enhanced thermoelectric performance of rough silicon nanowires. Nature, 2008, (451), 163-167, 3: Jongmin and et al.; Tuning the crystallinity of thermoelectric Bi2 Te3 nanowire arrays grown by pulsed electrodeposition. Nanotechnology, 2008, (19), 365701, 4: Joshi, Lee, Lan, Wang, Zhu, Wang, Gould, Cuff, Tang, Dresselhaus, Chen and Ren; Enhanced Thermoelectric Figure-of-Merit in Nanostructured p-type Silicon Germanium Bulk Alloys. Nano Lett., 2008, (8), 4670-4674, 5: Mannam, Agarwal, Roy, Singh, Varahramyan and Davis; Electrodeposition and Thermoelectric Characterization of Bismuth Telluride Nanowires. J. Electrochem. Soc., 2009, (156), B871-B875, 6: Pichanusakorn and Bandaru; Nanostructured thermoelectrics. Mat. Sci. Eng. R, 2009, (67), 19-63, 7: Yoo, Xiao, Bozhilov, Herman, Ryan and Myung; Electrodeposition of Thermoelectric Superlattice Nanowires. Adv. Mater., 2007, (19), 296-299.] New advancements through thermoelectric nanowire morphologies have shown that the anisotropy of the nanostructure diminishes transport of phonons through the thermoelectric but not charge carriers. Effectively decoupling κ from σ, this allows for the reduction of thermal conductivity without a significant change in electrical conductivity. This occurs in nanostructures due to the respective wavelengths of phonons and electrons; while the wavelength of the phonon is related to the crystal lattice parameter, the de Broglie or Compton wavelength of electrons is much smaller. Phononic energy wavelengths are on the order of 1-10 nm, roughly 1000-10,000 times larger than that of an electron. Often beginning at a few hundred nanometers of nanostntcture confinement, phonon waves begin to interact. As the nanostructure confinement increases below the phonon localization length (<100 nm), phonon waves experience an unallowable energy state and are localized at the surface. At 1-10 nm, the thermoelectric structure acts as a phonon wave-guide, severely disrupting heat propagation and severely diminishing thermal conductivity. Nanostructuring has also led to enhanced thermopower ({circle around (R)}Tav).
Many types of thermoelectric nanowires have been developed which include combinations of materials such as Bi, Be, Ge, Pb, Sb, Se, Si, Te and Zn. Phonon localization has been observed in Si thermoelectric nanowires by P. Yang and co-workers down to nanowire diameters of 22 nm highlights the differences in the intrinsic thermal conductivity of a Si when it becomes increasingly. anisotropic. [Hochbaum, Chen, Delgado, Liang, Garnett, Najarian, Majumdar and Yang; Enhanced thermoelectric performance of rough silicon nanowires. Nature, 2008, (451), 163-167.] As nanowire diameter decreases, phonon interaction causes wave superposition, folding and scattering, resulting in a lower thermal conductivity. Studies also report no effective reduction in electrical conductivity as thermal conductivity was decreased. Unfortunately, the decrease of conductivity due to phonon interaction only results in a moderate increase in zT, likely because sufficient nanowire anisotropy has not yet been reached.
Theoretical calculations show the immense potential that ultra-low diameter nanostructures can have on zT. [1: Hicks and Dresselhaus; Thermoelectric figure of merit of a one-dimensional conductor. Phys. Rev. B, 1993, (47), 16631-16634.] Such calculations show, however, that significant enhancements in zT are only observed once the confinement length (i.e. nanowire diameter) drops below 20 nm. Only at dimensions below 10 nm is the nanostructure confinement on the order of or less than that of the phonon wavelength. A 100-fold increase in phonon scattering has been found as nanowire diameter decreased from 20 to 1 nm, while electron scattering only decreased by a factor of 2. [8: Kim, Stroscio, Bhatt, Mickevicius and Mitin; Electron-Optical-Phonon Scattering Rates in a Rectangular Quantum Wire. J. Appl. Phys., 1991, (70), 319-325.] Therefore, achieving zT 4 likely requires nanostructures with diameters less than 5 nm.
The increases in zT described above have not been experimentally obtained due to the difficulty associated with fabrication of ultra-low diameter nanostructures. Furthermore, these dimensions are beyond the current technology of lithography and reactive ion etching. One of the most successful approaches for producing nanowires is based on the vapor-liquid-solid (VLS) growth process. The diameter of the nanowire is determined by the size of the seed nanocrystal with diameters approaching molecular dimensions (as small as 3 nm). One inherent problem with these approaches, however, is the formation of entangled meshes of nanowires. For this reason, vertical arrays using seed nanocrystals on substrates have been created through chemical vapor deposition (CVD), an approach that generates aligned, single-crystalline nanowires but whose diameters are typically much larger than the VLS method. These larger diameters are due to the combined effects of surface tension and Oswald ripening, but this makes small diameter nanowires very difficult to achieve.
Others have focused on forming nanowires in predefined architectures to allow easier processing and integration of the nanostructures into functioning devices. Fabrication of nanowires within an ordered template offers the possibility of manipulating nanowires into useful configurations and allows their aspect ratios and, hence, their physical properties to be tailored. Nanometer-wide channels of ordered anodic aluminum oxide films, polycarbonate track etched membranes, oriented steps at single crystal surfaces and nanochannel array glasses have previously been used as templates for nanowires. However, anodic aluminum oxide provides the highest degree of control over nanowire diameter, length spacing, density and orientation.
The formation of ordered nanoporous arrays via the controlled electrochemical anodic oxidation of aluminum has been studied since 1970 both as freestanding anodic aluminum oxide (AAO) templates on aluminum and as supported films on other materials. Recently, there have been attempts to fabricate AAO on transparent conductive oxides as a facile route in order to produce photovoltaic or ancillary photovoltaic devices via low-cost electrochemical methods. Usage of AAO directly or as an indirect route to nanostructure synthesis is an attractive method as aluminum is a low-cost material and the electrochemical self-assembly of the nanoporous array upon aluminum anodization is a low-cost method. As such, AAO has been utilized to fabricate, by electrodeposition, condensation or layer-by-layer coating, a wide variety of freestanding nanostructures or oriented arrays of nanostructures on supports. The pore diameter, spacing (density) and arrangement are strongly affected by anodization bath (acid) composition, concentration as well as temperature and applied anodization potential. The length of the nanopores are determined purely by anodization time and etch rate: which is slow for mild anodization (2-10 μm/h) and much more rapid for hard anodization (60-100 μm/h). Typically, the largest pores are obtain by mild anodization in phosphoric acid at high voltages (1-3 M, ˜100 V), which yields pores on the order of 150-500 nm in diameter. Similarly, mild anodization in oxalic acid at moderate voltages and sulfuric acid at low voltages (0.3 M, 40-80 V and 10-30 V, respectively) yield pores with diameters in the range of 50-100 nm and 10-50 nm, respectively. Furthermore, hard anodization at high voltages in oxalic acid (0.3 M, 120-140 V) has recently been employed to fabricated low pore density AAO at higher growth rates. The methods developed and presented in the following application, however, can dramatically enhance pore density (porosity) during hard anodization in oxalic acid.
Aside from the conformal nature of the invention, the primary advancement is the ability to reduce the diameter of the AAO below its natural lower limit by incorporation of other materials within or on the walls of the AAO pores. This has been accomplished through filling the AAO pores with mesoporous silica, coating the AAO pores with mesoporous silica [9: Hill, Cotton and Ziegler; Alignment and Morphology Control of Ordered Mesoporous Silicas in Anodic Aluminum Oxide Channels by Electrophoretic Deposition. Chem. Mater., 2009, (21), 1841-1846.] or layer-by-layer deposition on the AAO template [10: Liu, Wang, Indacochea and Wang; Interference color of anodized aluminum oxide (AAO) films for sensor application. Sensors and Smart Structures Technologies for Civil, Mechanical, and Aerospace Systems 2009, 2009, (7292), 729217-11.]. Furthermore, the fabrication of thermoelectric nanostructures within ultra-low diameter nanopores has been predicted and partially verified to substantially enhance factors contributing to thermoelectric performance.
FIG. 1 depicts the overall invention methodology. Aluminum is first molded into a shape such that it is conformal with the part to which it will be mated. Alternatively, the mating part itself may be used in the first step as long as it is constructed of aluminum or another suitable material as mentioned above. The part is then placed in a cold acid bath and anodized to form the nanoporous template, with anodization time depending on the desired pore depth and the final template etched to open up the bottom of the pore as well as slightly widen the pores. The anodization voltage, bath temperature as well as acid composition and concentration are adjusted to control oxide growth rate, pore diameter and density. At this point, the thermoelectric (or other) material can be electrodeposited into the template, forming high aspect ratio nanowires. Alternatively, a material can be used to coat the nanopores with a pore reduction material to obtain wall-coated nanopores (previously referred to as PRM) in order to shrink the diameter down below the lower limit obtained with anodization. This coating process can be self-initiating by adjusting the pH of a coating solution above (or below) the isoelectric point of the nanoporous material, inducing a net negative change (or positive; depending on the isoelectric point) on the surface of the material. If the PRM is chosen such that it charges oppositely than the nanopore surface, Coulombic attraction will induce deposition of the PRM until charge is balanced at the liquid-solid. Furthermore, if two PRMs are chosen such that they have opposite charges in a given solution, while inducing the same surface charge on the nanoporous material, a layer-by layer coating can be formed. The thickness of this coating can be controlled to dimensions as small as the thickness of the electrochemical double layer of the nanoporous material/solution/PRM system and as high as the pore diameter itself. Thereby, the pore diameter can be effectively reduced below the fabrication limits of the AAO. In addition, the nanopores can also be filled, subsequent to the PRM coating, with material which has a reduced diameter due to the PRM to create a Type I hierarchical structure.
An additional alternative to a coating process is to use electric fields to both (a) deposit a PRM within the AAO nanopores and (b) to form and axially aligned pores intrinsic to mesoporous PRMs within the AAO nanopores to create a Type II hierarchical structure as shown and described in more detail below. These pores can also be included with material to obtain a Type II hierarchical nanostructure array as will also be described.
Once the nanoporous template is filled with a thermoelectric material, a complete thermoelectric device is formed by closing the electrical circuit with a conductive contact junctioning a plurality of nanowires to a plurality of nanowires of a different dopant type (i.e. n- or p-type). Otherwise, the thermoelectric properties of the individual n- or p-type nanowire/AAO assembly can be gathered via electrical and thermal characterization. The method of the present invention provides a fabrication procedure to both: (i) investigate the dependence of thermoelectric properties (such as figure of merit, thermal and electrical conductivity) as a function of nanostructure anisotropy (nanowire diameter) and (ii) fabricate conformal nanostructured thermoelectric generators with efficiency improvements when compared to the performance of bulk material thermoelectric counterparts.
The AAO can be selectively dissolved, leaving behind and array of ultra-high aspect ratio PRM-coated or bare nanostructures. This array, while fragile, has better performance in a thermoelectric device due to the fact that all thermal energy is transported through the thermoelectric nanostructure material. Though the AAO has a low thermal conductivity, as low as 0.1 W/mK, and the bare PRM-coated nanostructure array is more desirable, it is also possible to support the PRM-coated nanostructure array in another material with a lower thermal conductivity material by simple dip coating methods. This material acts to structurally support the PRM-coated nanostructure array as well as minimize the amount of heat transported through the array, which is an energy loss mechanism.
The AAO templates produced in accordance with the present invention can be fabricated with a wide range of pore diameters, lengths and densities. Examples of several different sized pores fabricated by the inventor are shown herein. The hereinafter-described AAO templates were all obtained from mild anodization at a pore growth rate of 2-10 μm/h. AAO templates can, however, also be fabricated, with less versatility in pore diameter, using hard anodization. Several different pore diameters (x, y, z nm) can obtained via the hard anodization of aluminum in both oxalic acid at 120-140 V and sulfuric acid at 20-40 V, where each hard anodization is first preceded by mild anodization to create an insulating layer to prevent dielectric breakdown. The pore growth rate of the AAO is much higher, typically 50-300 μm/h. SEM imaging need not be employed to verify the formation of ordered and arrayed nanopores during the fabrication of AAO.
Monitoring of the chronoamperometric response has been successfully employed and is known. The AAO template serves as the preliminary structure directing medium for nanostructure growth. Whether using AAO templates or hierarchical templates containing a PRM, material can be electrodeposited within them to obtain ultra-high aspect ratio nanostructures. As an example FIG. 7 shows the electrical conductivity vs. temperature for as-electrodeposited Bi2Te3 thermoelectric films.